Design-Reuse

Xilinx Virtex-5 Devices First FPGAs in Production to Demonstrate Interoperability with DDR3 SDRAM Technology

SAN JOSE, Calif., July 31, 2007 – Xilinx, Inc. (NASDAQ: XLNX), the world’s leading supplier of programmable solutions, today announced that its Virtex™-5 FPGA devices are interoperable with 800 ...
Arizona Daily Star

Everspin Expands MRAM Ecosystem with Xilinx FPGAs

Generator (MIG) DDR3 DRAM controller to make it compatible with its 256 Megabit DDR3 ST-MRAM memory that is available now and will do the same for the 1 Gigabit DDR4 ST-MRAM by June of this year.
Design-Reuse

Xilinx Integrated Block for the PCI Express Gen3 Standard Accelerates Productivity and Increases System Performance

SAN JOSE, Calif. -- June 27, 2012 -- Xilinx, Inc. (NASDAQ: XLNX) today announced its solution for designs using the Virtex®-7 field programmable gate array (FPGA) integrated block for PCI Express® ...
EDN

Xilinx Virtex 7 FPGA , DDR3 Core and 3.3V System Rail Quad Power Supply

The PMP7828 uitlizes the TPS53355, TPS53318, and TPS53319 buck converters using TI NexFET PowerStack technology to power Xilinx Virtex7 FPGA core and I/O, DDR memory core, and 3.3V System Rail with ...
EDN

Designing DDR3 SDRAM controllers with today’s FPGAs

The recently introduced DDR3 SDRAM technology paves the way to higher data rates (from 800 Mbps to 1600 Mbps) and provides higher performance for many systems that depend on data, video, or packet ...